#include <stdio.h>

/*
 * 位校验
 */

#define IS_SET(flag, bit)	((flag) & (bit))

int f(unsigned int a)
{
	int i;
	int rt = 0;

	for (i = 0; i < 32; i++) {
		if (IS_SET(a, 1 << i))
			rt++;
	}

	return rt;
}

int main()
{
	f(0x12345678);
}

#if 0
/*
 * intel
 */
0000000000001129 <f>:
    1129:	f3 0f 1e fa          	endbr64 
    112d:	55                   	push   %rbp
    112e:	48 89 e5             	mov    %rsp,%rbp
    1131:	89 7d ec             	mov    %edi,-0x14(%rbp)
    1134:	c7 45 fc 00 00 00 00 	movl   $0x0,-0x4(%rbp)
    113b:	c7 45 f8 00 00 00 00 	movl   $0x0,-0x8(%rbp)
    1142:	eb 1d                	jmp    1161 <f+0x38>
    1144:	8b 45 f8             	mov    -0x8(%rbp),%eax
    1147:	ba 01 00 00 00       	mov    $0x1,%edx
    114c:	89 c1                	mov    %eax,%ecx
    114e:	d3 e2                	shl    %cl,%edx
    1150:	89 d0                	mov    %edx,%eax
    1152:	23 45 ec             	and    -0x14(%rbp),%eax
    1155:	85 c0                	test   %eax,%eax
    1157:	74 04                	je     115d <f+0x34>
    1159:	83 45 fc 01          	addl   $0x1,-0x4(%rbp)
    115d:	83 45 f8 01          	addl   $0x1,-0x8(%rbp)
    1161:	83 7d f8 1f          	cmpl   $0x1f,-0x8(%rbp)
    1165:	7e dd                	jle    1144 <f+0x1b>
    1167:	8b 45 fc             	mov    -0x4(%rbp),%eax
    116a:	5d                   	pop    %rbp
    116b:	c3                   	retq   

000000000000116c <main>:
    116c:	f3 0f 1e fa          	endbr64 
    1170:	55                   	push   %rbp
    1171:	48 89 e5             	mov    %rsp,%rbp
    1174:	bf 78 56 34 12       	mov    $0x12345678,%edi
    1179:	e8 ab ff ff ff       	callq  1129 <f>
    117e:	b8 00 00 00 00       	mov    $0x0,%eax
    1183:	5d                   	pop    %rbp
    1184:	c3                   	retq   
    1185:	66 2e 0f 1f 84 00 00 	nopw   %cs:0x0(%rax,%rax,1)
    118c:	00 00 00 
    118f:	90                   	nop

/*
 * arm
 */
000000000040051c <f>:
  40051c:	d10083ff 	sub	sp, sp, #0x20
  400520:	b9000fe0 	str	w0, [sp, #12]
  400524:	b9001bff 	str	wzr, [sp, #24]
  400528:	b9001fff 	str	wzr, [sp, #28]
  40052c:	1400000f 	b	400568 <f+0x4c>
  400530:	b9401fe0 	ldr	w0, [sp, #28]
  400534:	52800021 	mov	w1, #0x1                   	// #1
  400538:	1ac02020 	lsl	w0, w1, w0
  40053c:	2a0003e1 	mov	w1, w0
  400540:	b9400fe0 	ldr	w0, [sp, #12]
  400544:	0a000020 	and	w0, w1, w0
  400548:	7100001f 	cmp	w0, #0x0
  40054c:	54000080 	b.eq	40055c <f+0x40>  // b.none
  400550:	b9401be0 	ldr	w0, [sp, #24]
  400554:	11000400 	add	w0, w0, #0x1
  400558:	b9001be0 	str	w0, [sp, #24]
  40055c:	b9401fe0 	ldr	w0, [sp, #28]
  400560:	11000400 	add	w0, w0, #0x1
  400564:	b9001fe0 	str	w0, [sp, #28]
  400568:	b9401fe0 	ldr	w0, [sp, #28]
  40056c:	71007c1f 	cmp	w0, #0x1f
  400570:	54fffe0d 	b.le	400530 <f+0x14>
  400574:	b9401be0 	ldr	w0, [sp, #24]
  400578:	910083ff 	add	sp, sp, #0x20
  40057c:	d65f03c0 	ret

0000000000400580 <main>:
  400580:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400584:	910003fd 	mov	x29, sp
  400588:	528acf00 	mov	w0, #0x5678                	// #22136
  40058c:	72a24680 	movk	w0, #0x1234, lsl #16
  400590:	97ffffe3 	bl	40051c <f>
  400594:	52800000 	mov	w0, #0x0                   	// #0
  400598:	a8c17bfd 	ldp	x29, x30, [sp], #16
  40059c:	d65f03c0 	ret


#endif

